interrupts.h00001
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00028 #ifndef _M68HC11_INTERRUPTS_H
00029 #define _M68HC11_INTERRUPTS_H
00030
00035
00037 typedef void (* interrupt_t) (void);
00038
00040 struct interrupt_vectors
00041 {
00042 interrupt_t res0_handler;
00043 interrupt_t res1_handler;
00044 interrupt_t res2_handler;
00045 interrupt_t res3_handler;
00046 interrupt_t res4_handler;
00047 interrupt_t res5_handler;
00048 interrupt_t res6_handler;
00049 interrupt_t res7_handler;
00050 interrupt_t res8_handler;
00051 interrupt_t res9_handler;
00052 interrupt_t res10_handler;
00053
00055 interrupt_t sci_handler;
00056
00058 interrupt_t spi_handler;
00059
00061 interrupt_t acc_input_handler;
00062
00064 interrupt_t acc_overflow_handler;
00065
00067 interrupt_t timer_overflow_handler;
00068
00070 interrupt_t output5_handler;
00071
00073 interrupt_t output4_handler;
00074
00076 interrupt_t output3_handler;
00077
00079 interrupt_t output2_handler;
00080
00082 interrupt_t output1_handler;
00083
00085 interrupt_t capture3_handler;
00086
00088 interrupt_t capture2_handler;
00089
00091 interrupt_t capture1_handler;
00092
00094 interrupt_t rtii_handler;
00095
00097 interrupt_t irq_handler;
00098
00100 interrupt_t xirq_handler;
00101
00103 interrupt_t swi_handler;
00104
00106 interrupt_t illegal_handler;
00107
00109 interrupt_t cop_fail_handler;
00110
00112 interrupt_t cop_clock_handler;
00113
00115 interrupt_t reset_handler;
00116 };
00117 typedef struct interrupt_vectors interrupt_vectors_t;
00118
00120 enum interrupt_vector_id
00121 {
00122 RES0_VECTOR = 0,
00123 RES1_VECTOR,
00124 RES2_VECTOR,
00125 RES3_VECTOR,
00126 RES4_VECTOR,
00127 RES5_VECTOR,
00128 RES6_VECTOR,
00129 RES7_VECTOR,
00130 RES8_VECTOR,
00131 RES9_VECTOR,
00132 RES10_VECTOR,
00133 SCI_VECTOR,
00134 SPI_VECTOR,
00135 ACC_INPUT_VECTOR,
00136 ACC_OVERFLOW_VECTOR,
00137 TIMER_OVERFLOW_VECTOR,
00138 TIMER_OUTPUT5_VECTOR,
00139 TIMER_OUTPUT4_VECTOR,
00140 TIMER_OUTPUT3_VECTOR,
00141 TIMER_OUTPUT2_VECTOR,
00142 TIMER_OUTPUT1_VECTOR,
00143 TIMER_INPUT3_VECTOR,
00144 TIMER_INPUT2_VECTOR,
00145 TIMER_INPUT1_VECTOR,
00146 RTI_VECTOR,
00147 IRQ_VECTOR,
00148 XIRQ_VECTOR,
00149 SWI_VECTOR,
00150 ILLEGAL_OPCODE_VECTOR,
00151 COP_FAIL_VECTOR,
00152 COP_CLOCK_VECTOR,
00153 RESET_VECTOR,
00154 MAX_VECTORS
00155 };
00156 typedef enum interrupt_vector_id interrupt_vector_id;
00157
00163 extern interrupt_t _vectors_addr[MAX_VECTORS];
00164
00165 extern interrupt_vectors_t _vectors __asm__("_vectors_addr");
00166
00168 #endif
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